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Poseidon Announces the Second Generation of Hardware Accelerator Synthesis for Processor-Based Designs; Poseidon's ESL Tools Enabled 14X Acceleration with 2 Man-Weeks Effort for YUV2RGB-Conversion Algorithm
SAN JOSE, Calif.—(BUSINESS WIRE)—July 24, 2006—
Poseidon Design Systems today announced the release of
the second generation Triton Builder tool. This enhancement supports
the generation of a fully pipelined hardware accelerator to increase
the performance of Poseidon's automated solutions by an additional
3-10X over our existing market leading technology. With this solution
designers can easily get between 10-450X performance increases from
standard ANSI C algorithms. This new performance capability enables a
whole new class of video, multimedia and imaging applications to be
implemented with embedded processor architectures, thereby increasing
flexibility and decreasing time to market.
Poseidon will be showing a demonstration of a color conversion and
DCT applications at the 2006 Design Automation Conference. This
application was generated using the Triton Tuner and Builder tool
suite with just 2 man weeks of effort. The resultant solution is
implemented on a Virtex 4 platform using the PowerPC core from Xilinx
and exhibits a 14X performance increase over the software running on
the processor.
Poseidon's Triton tool suite is comprised of two tools, Tuner and
Builder, which provides the designer with the ability to fully develop
an efficient processor-based architecture. Poseidon's Tuner tool
offers hardware and software architects an easy to use SystemC
simulation environment to quickly analyze and optimize complex
software, architectures and systems. With the Builder Tool, time
critical algorithms can also be partitioned and migrated from software
into dedicated hardware solutions with an efficient hardware
accelerator. Through hardware acceleration significant increases in
performance can be obtained along with reductions in power and
development time. With Poseidon Triton tools designers can tradeoff
Performance, power and cost. These tools support ARM, PowerPC,
MicroBlaze and Nios II architectures on ASIC and FPGA platforms. The
solutions are optimized for video, VoIP, audio, imaging, wireless,
networking, and security devices.
About Poseidon Design Systems
Poseidon is an Electronic Design Automation and Service company
with offices in Atlanta, GA, San Jose, CA, and Bangalore, India.
Founded in July 2002, Poseidon provides products and services for
modeling and designing processor-based SoCs. Poseidon's Electronic
System Level tools allow users to rapidly analyze, optimize and
accelerate a complete SoC system. For additional information about
Poseidon Design Systems, visit www.poseidon-systems.com.
Poseidon will be conducting daily seminars titled "Using ESL to
Increase Performance While Reducing Power, Time to Market and Cost" at
the Design Automation Conference in San Francisco, CA on July 24-26.
To register please contact Farzad Zarrinfar at:
Phone: 925-292-1670
Email: Farzad.Zarrinfar@poseidon-systems.com
Note: All trademarks and registered trademarks are the property of
their respective owners.
Contact:
Poseidon Design Systems, Inc., San Jose
Farzad Zarrinfar, 925-292-1670
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